1. Field of the Invention
The present invention relates to a COF (Chip On Film) semiconductor device and a manufacturing method for the same, wherein semiconductor elements are mounted on and conjugated to a flexible printed circuit.
2. Description of the Background Art
Thin film insulating tapes that are freely foldable have been utilized in COF semiconductor devices taking advantage of their properties. Each of the patterned wires arranged on the surface of such a thin film insulating tape is electrically connected to a corresponding terminal of a semiconductor element. An external connector of the patterned wires is connected to a liquid crystal panel, a printed circuit board, and the like. A solder resist is applied to the exposed portions of the patterned wires other than the above so that the insulated condition is secured.
Connection and molding methods such as MBB (Micro Bump Bonding), NCP (Non-Conductive Paste), which have attracted attention in recent years, and ACP (Anisotropic Conductive Paste) are known as one of manufacturing methods for COF semiconductor devices that are effectively used as prior arts for an element having multi-pins, a narrow pitch and edge touch.
These methods are manufacturing methods for intervening an insulating resin composition between a semiconductor element and a flexible printed circuit so as to connect protruding electrodes of the semiconductor element with the wiring pattern of the flexible printed circuit and so as to, at the same time, mold the electrodes and the wiring pattern in resin. Here, the application method for the insulating resin composition is not specified.
A manufacturing method for a COF semiconductor device (Japanese Unexamined Patent Publication No. S60(1985)-262430, for example) according to the conventional example 1 using the above described MBB is shown in FIGS. 5(a) to 5(d). According to the conventional example 1, first, an insulating resin composition 22 is applied to the position, on a wiring pattern 2 of a flexible printed circuit, to which a plurality of protruding electrodes (bumps) of a semiconductor element is conjugated as a resin discharging nozzle 8 is shifted, as shown in FIGS. 5(a) and 5(b). A photo-curing or thermosetting resin is used for the above insulating resin composition 22. Here, symbol 1 in FIGS. 5(a) to 5(d) indicates a thin film insulating tape and symbol 5 indicates a solder resist. Then, as shown in FIG. 5(c), a plurality of protruding electrodes 9 of a semiconductor element 3 is positioned on the wiring pattern 2. Then, pressure is applied to the semiconductor element 3, which has been placed on the insulating resin composition 22, so that the insulating resin composition 22 between the protruding electrodes 9 and the wiring pattern 2 are expanded resulting in electrical connections between the protruding electrodes 9 and the wiring pattern 2 due solely to pressure proceeding. At the same time, the insulating resin composition 22 is pressed out to the periphery of semiconductor element 3. Here, the arrows denoted by the symbol 21 indicate pressure while the arrows denoted by symbol 12 indicate the flow of resin toward the outer periphery of the semiconductor element. After that, as shown in FIG. 5(d), the insulating resin composition 22 in this condition is cured by means of light or heat so as to fix the semiconductor element 3 on the flexible printed circuit. Here, the arrows denoted by the symbol 23 indicate light irradiation or the application of heat.
A manufacturing method for a COF semiconductor device (Japanese Unexamined Patent Publication No. S63(1988)-151033, for example) according to the conventional example 2 using the above described MBB is shown in FIGS. 6(a) to 6(d). Here, the same symbols in FIGS. 5(a) to 5(d) of the conventional example 1 are attached to the same elements in FIGS. 6(a) to 6(d). According to the conventional example 2, first, the insulating resin composition 22 is applied to the position, on the wiring pattern 2 of a flexible printed circuit, to which a plurality of protruding electrodes of a semiconductor element is conjugated as the resin discharging nozzle 8 is shifted, as shown in FIGS. 6(a) and 6(b). A thermosetting resin is used for the above insulating resin composition 22. Then, as shown in FIG. 6(c), the respective protruding electrodes 9 of the semiconductor element 3 are positioned on the wiring pattern 2. After that, the semiconductor element 3 that has been placed on the insulating resin composition 22 is pressed to the flexible printed circuit using a pulse heat application tool (not shown) so that the insulating resin composition 22 on the wiring pattern 2 is pressed out to the periphery. After that, as shown in FIG. 6(d), the above described pulse heat application tool is energized so as to apply heat to the semiconductor element 3 in the condition wherein the semiconductor element 3 is pressed to the flexible printed circuit and, thereby, the insulating resin composition 22 is thermo-set so as to fix the semiconductor element 3 on the flexible printed circuit. At the same time, the respective protruding electrodes 9 and the wiring pattern 2 are electrically connected. Here, the arrows denoted by symbol 24 FIG. 6(d) indicate pulse heat application in a condition wherein pressure is applied.
One problem concerning the conventional example 1 is the case wherein bubbles 13 (shown as white dots) occur when the insulating resin composition 22 is cured after the insulating resin composition 22 is applied to a thin film insulating tape 1, to which the semiconductor element 3 is contacted by means of pressure proceeding (see FIG. 5(d)). The above case is described in further detail as follows: The bubbles 13 may occur due to factors such as a), b) and c): a) air (failure of fill-in) that becomes enclosed at the time when the semiconductor element 3 is contacted by means of pressure proceeding because of gaps between resin lines of the insulating resin composition 22 in the form of ridges applied by means of the resin discharging nozzle 8 or because of unevenness of the surface of the resin (see FIG. 5(b)) due to application of the insulating resin composition 22 over regions with and without the wiring pattern 2; b) outgassing generated at the time of the curing of the insulating resin composition 22; and c) moisture produced at the time when the thin film insulating tape 1, which has absorbed moisture, is dried. As described above, disadvantages such as leak of current between the protruding electrodes 9 as well as corrosion of aluminum electrodes of the semiconductor element, for example, may occur depending on the degree of occurrence of the bubbles 13 or on the condition of utilization of the COF semiconductor device having the bubbles 13 in the insulating resin composition 22 after curing.
In addition, the surface of insulating resin composition 22 after application is uneven in the same manner as in the conventional example 1 (see FIG. 6(b)) in the case wherein a pressure application tool that is constantly heated or a pressure application tool that is pulse-heated is used as in the conventional example 2. Therefore, there is a problem wherein the bubbles 13, shown as white dots in FIG. 6(d), remain in the insulating resin composition 22 after curing.